Semiconductor package structure and method for manufacturing the same

A semiconductor package structure, comprising:

• a first insulating layer having an upper surface, a lower surface, and a side surface, the first insulating layer defining a first through hole extending through the first insulating layer;
• a first conductive layer having an upper surface, and comprising a conductive pad disposed in the first through hole and a trace disposed on the upper surface of the first insulating layer;
• a multi-layered circuit structure disposed on the upper surface of the first conductive layer, wherein the multi-layered circuit structure comprises a bonding region disposed on the conductive pad of the first conductive layer and an extending region disposed on the trace of the first conductive layer;
• a protection layer covering the upper surface of the first insulating layer and the extending region of the multi-layered circuit structure, and exposing the bonding region of the multi-layered circuit structure, wherein the protection layer has a side surface that is not coplanar with the side surface of the first insulating layer;
• a semiconductor chip electrically connected to the multi-layered circuit structure;
• and at least one solder bump connecting the semiconductor chip and the multi-layered circuit structure, wherein the multi-layered circuit structure comprises a barrier layer disposed on the upper surface of the first conductive layer, wherein the multi-layered circuit structure further comprises a wetting layer disposed on a the barrier layer.