Delayed write-back in memory with calibration support
AssigneeEverspin Technologies, Inc.
InventorSyed M. Alam
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AssigneeEverspin Technologies, Inc.
InventorSyed M. Alam
Estimating the term…
A memory having a delayed write-back to the array of data corresponding to a previously opened page allows delays associated with write-back operations to be avoided. After an initial activation opens a first page and the read/write operations for that page are complete, write-back of the open page to the array of memory cells is delayed until after completion of a subsequent activate operation that opens a new page. Techniques to force a write-back in the absence of another activate operation are also disclosed. Calibration and testing sequences are also supported in which a non-destructive mode preserves data stored in a non-volatile memory array and status bits used to indicate open pages are cleared so later inadvertent delayed write-back operations as a result of the calibration or testing do not corrupt the non-volatile data.
A memory, comprising:
A method for operation of a memory that includes a non-volatile memory array and a first cache, the method comprising:
A method for controlling a memory, comprising:
Dependencies are inferred from the claim text.