Semiconductor devices and operations thereof
AssigneeSK hynix Inc.
InventorsKi Hun Kwon, Jae Il Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor device may be provided. The semiconductor device may include a power-down signal generation circuit and a refresh signal generation circuit. The power-down signal generation circuit may be configured to generate a power-down signal which is enabled during a power-down operation period based on a multi-operation signal that is generated by decoding commands. The refresh signal generation circuit may be configured to generate a refresh signal which is enabled during a refresh operation period based on the multi-operation signal and an operation selection signal.
Claims20
A semiconductor device comprising:
- a power-down signal generation circuit configured to generate a power-down signal indicating a power-down operation being activated;
- and
- a refresh signal generation circuit configured to generate a refresh signal indicating a refresh operation being activated,
- wherein the power-down operation starts based on first command signals and a first polarity of an operation selection signal,
- wherein the refresh operation starts based on the first command signals and a second polarity, opposite to the first polarity, of the operation selection signal, and
- wherein the first command signals and the operation selection signal are inputted from an external device.
A semiconductor device comprising:
- a power-down signal generation circuit configured to generate a power-down signal indicating a power-down operation being activated based on first command signals inputted from an external device via a plurality of pads;
- and
- a refresh signal generation circuit configured to generate a refresh signal indicating a refresh operation being activated based on second command signals inputted from the external device via the plurality of pads,
- wherein the power-down signal generation circuit controls the power-down signal based on a termination signal indicating that the refresh operation exits.
A semiconductor device comprising:
- a power-down signal generation circuit configured to generate a power-down signal corresponding to a power-down operation period;
- and
- a refresh signal generation circuit configured to generate a refresh signal corresponding to a refresh operation period,
- wherein the power-down operation period starts based on first signals and a first polarity of an operation selection signal,
- wherein the refresh operation period starts based on the first signals and a second polarity, opposite to the first polarity, of the operation selection signal, and
- wherein the power-down signal generation circuit controls the power-down signal in response to a termination signal indicating that the refresh operation period exits.
A method comprising:
- receiving first signals from an external device via a plurality of pads;
- first-capturing a value of an operation selection signal in synchronization with a first edge of an external clock inputted from the external device via a pad separate with the plurality of pads;
- determining whether starting a refresh operation or not based on the value of the operation selection signal;
- and
- when the refresh operation does not start, performing a power-down operation in synchronization with the external clock.
Dependencies are inferred from the claim text.