Semiconductor storage device and method of controlling the same
AssigneeToshiba Memory Corporation
InventorsAkio Sugahara, Yoshikazu Harada, Shoichiro Hashimoto
Life of this patent
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Abstract
In one embodiment, a semiconductor storage device includes a plurality of memory chips, at least one of the memory chips including a first controller configured to be shifted to a wait state of generating a peak current, before generating the peak current in accordance with a command. The device further includes a control chip including a second controller configured to search a state of the first controller and control, based on a result of searching the state of the first controller, whether or not to issue a cancel instruction for the wait state to the first controller that has been shifted to the wait state.
Claims17
A semiconductor storage device comprising:
- a plurality of memory chips, at least one of the memory chips including a first controller configured to be shifted to a wait state of generating a peak current, before generating the peak current in accordance with a command;
- and
- a control chip including a plurality of counters, at least one of the counters being configured to generate a count value that corresponds to a time period of generating the peak current, and a second controller configured to search a state of the first controller and control, based on a result of searching the state of the first controller and the count value by a counter, whether or not to issue a cancel instruction for the wait state to the first controller that has been shifted to the wait state.
A semiconductor storage device comprising:
- a plurality of memory chips, at least one of the memory chips including a first controller configured to output first data, before generating a peak current in accordance with a command;
- and
- a control chip including a plurality of counters, at least one of the counters being configured to generate a count value that corresponds to a time period of generating the peak current, and a second controller configured to control, based on the count value by a counter, whether or not to output second data according to the first data from the first controller,
- wherein the first controller is configured to generate the peak current according to the second data from the second controller.
A method of controlling a semiconductor storage device including a plurality of memory chips and a control chip, the method comprising:
- shifting a first controller in one of the memory chips to a wait state in which the first controller generates a peak current, before the first controller generates the peak current in accordance with a command;
- generating, by at least one of a plurality of counters in the control chip, a count value that corresponds to a time period of generating the peak current;
- and
- causing a second controller in the control chip to search a state of the first controller and controlling, based on a result of searching the state of the first controller and the count value by a counter, whether or not to issue a cancel instruction for the wait state to the first controller that has been shifted to the wait state.
Dependencies are inferred from the claim text.