Local internal discovery and configuration of individually selected and jointly selected devices
AssigneeRambus Inc.
InventorJohn Eric Linstadt
Life of this patent
Estimating the term…
Abstract
A memory controller interfaces with one or more memory devices having configurable width data buses and configurable connectivity between data pins of the memory devices and data pins of the memory controller. Upon initialization of the memory devices, the memory controller automatically discovers the connectivity configuration of the one or more memory devices, including both individually selected and jointly selected devices. After discovering connectivity of the connected devices, the memory controller configures the memory devices according to the discovered connectivity and assigns unique addresses to jointly selected devices.
Claims20
A configurable width memory device, comprising:
- a memory core comprising a plurality of memory cells to store data, the memory core having a plurality of data lines to read from or write to the plurality of memory cells;
- a multiplexer coupled to the plurality of data lines of the memory core, the multiplexer selectively associating one or more of the plurality of data lines of the memory core with one or more of a plurality of data pins;
- and
- memory device logic to receive a connectivity echo command from a memory controller, to read an input bit pattern from the plurality of data pins in response to the connectivity echo command, to apply a rotation operation to the input bit pattern to generate an output bit pattern, and to output the output bit pattern to the plurality of data pins.
A method for operating a configurable width memory device, comprising:
- selectively coupling, by a multiplexer one or more data pins of the configurable width memory device with a one or more data lines of a memory core in the memory device;
- receiving a connectivity echo command from a memory controller;
- reading an input bit pattern from a plurality of data pins of the configurable width memory device in response to the connectivity echo command;
- applying a rotation operation to the input bit pattern to generate an output bit pattern;
- and
- outputting the output bit pattern to the plurality of data pins.
A memory controller for configuring one or more configurable width memory devices, the memory controller comprising:
- a command/address link coupled to the one or more configurable width memory devices;
- a plurality of memory controller data pins coupled to respective memory device data pins of the one or more configurable width memory devices;
- a connectivity logic circuit to determine that a connectivity configuration of the one or more configurable width memory devices is initially undetermined, to transmit a connectivity echo command and an input bit pattern to the one or more configurable width memory devices, to receive an echoed and rotated bit pattern in response to the connectivity echo command, and to determine the connectivity configuration of the one or more configurable width memory devices in response to the echoed bit pattern.
Dependencies are inferred from the claim text.