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US 10,649,923 B1Granted
Broadcasting writes to multiple modules
AssigneeAmazon Technologies, Inc.
InventorsAsif Khan, Robert Michael Johnson
Life of this patent
Estimating the term…
Abstract
A controller is configured to transmit a broadcast write request on at least one bus. The broadcast write request includes an address and a value. A first logic module determines that the broadcast write request is targeting the first logic module. The first logic module stores the value at a first addressed register specified by the register address. The second logic module determines that the broadcast write request is targeting the second logic module. The second logic module stores the value at a second addressed register specified by the register address. The first and second logic modules are connected to the at least one bus.
Claims20
An integrated circuit device comprising:
- a bus circuit;
- logic module circuits sequentially coupled to the bus circuit, the logic module circuits each including a respective plurality of registers operable to perform a same function within each respective logic module circuit;
- and
- a bus controller circuit coupled to the bus circuit;
- wherein the integrated circuit device is operable to:
- receive, at the bus controller circuit, a write request, the write request including a broadcast indicator, an address, and data;
- transmit, by the bus controller circuit, the write request to a first logic module circuit in a sequential order of the logic module circuits;
- determine, by the first logic module circuit, to accept the write request, wherein the first logic module circuit determines to accept the write request based on the broadcast indicator;
- write, by the first logic module circuit, data to a first register identified by the address;
- transmit, by the first logic module circuit, the write request to a next logic module circuit in the sequential order of the logic module circuits;
- receive, at a last logic module circuit in the sequential order of the logic module circuits, the write request;
- determine, by the last logic module circuit, to accept the write request, wherein the last logic module circuit determines to accept the write request based on the broadcast indicator;
- write, by the last logic module circuit, the data to a second register identified by the address;
- transmit, by the last logic module circuit, the write request to the bus controller circuit;
- transmit, by at least one of the logic module circuits, a write completion response to a different logic module circuit of the logic module circuits;
- and
- output, by the bus controller circuit, a response indicating completion of the write request.
14 more elements
An integrated circuit device comprising:
- a bus circuit;
- logic module circuits coupled to the bus circuit, wherein each logic module circuit is operable to perform a same logical operation on different streams of data, and wherein each logic module circuit includes a respective plurality of registers;
- and
- a bus controller circuit coupled to the bus circuit;
- wherein the integrated circuit device is operable to:
- receive, at the bus controller circuit, a write request, the write request including a broadcast indicator, an address, and data;
- transmit, by the bus controller circuit, the write request onto the bus circuit for receipt by each of the logic module circuits;
- determine, by each of the logic module circuits, to accept the write request, wherein each logic module circuit determines to accept the write request based on the broadcast indicator;
- write, by each of the logic module circuits, the data to a register identified by the address;
- transmit, by at least one of the logic module circuits, a write completion response to a different logic module circuit of the logic module circuits;
- determine, by the bus controller circuit, that each of the logic module circuits has written the data;
- and
- output, by the bus controller circuit, a response indicating completion of the write request.
10 more elements
A computer-implemented method, the method comprising:
- receiving, at a bus controller circuit of an integrated circuit device, a write request, the write request including a broadcast indicator, an address, and data;
- transmitting, by the bus controller circuit, the write request onto a bus circuit of the integrated circuit device for receipt by logic module circuits coupled to the bus circuit, wherein each of the logic module circuits receives the write request, wherein each logic module circuit is operable to perform a same logical operation on different streams of data, and wherein each logic module circuit includes a respective plurality of registers;
- determining, by each of the logic module circuits, to accept the write request, wherein each logic module circuit determines to accept the write request based on the broadcast indicator;
- writing, by each of the logic module circuits, the data to a register identified by the address;
- transmitting, by at least one of the logic module circuits, a write completion response to a different logic module circuit of the logic module circuits;
- determining, by the bus controller circuit, that each of the logic module circuits has written the data;
- and
- outputting, by the bus controller circuit, a response indicating completion of the write request.
5 more elements
Dependencies are inferred from the claim text.