Disaggregated computing architecture using device pass-through wherein independent physical address spaces between systems nodes are implemented in a single execution environment

A compute node of a disaggregated computing architecture, the compute node comprising an interconnect interface, wherein:

• the compute node executes a host operating system and instantiates a first virtual machine executing a guest device driver for driving a physical device of a disaggregated accelerator node, wherein the compute node and the disaggregated accelerator node are separate system nodes having independent physical address spaces and configured to implement a single execution environment;
• one or more input registers of the physical device are accessible via a first uniform physical address range of an interconnection network linking the compute node and the disaggregated accelerator node;
• and
• the interconnect interface of the compute node is configured to map a host physical address range of the host operating system to the first uniform physical address range.

An accelerator node of a disaggregated computing architecture, the accelerator node comprising:

• a physical device;
• one or more input registers of the physical device accessible via a first uniform physical address range of an interconnection network linking the accelerator node to a compute node, wherein the compute node and the accelerator node are separate system nodes having independent physical address spaces and configured to implement a single execution environment;
• and
• a memory management unit configured to map addresses in a guest physical address range of a first virtual machine instantiated in the compute node to a second uniform physical address range for accessing an address range in a first memory node associated with the first virtual machine.

A method of driving a physical device of an accelerator node in a disaggregated computing architecture using device pass-through, wherein a first compute node and the accelerator node are separate system nodes having independent physical address spaces and configured to implement a single execution environment, the method comprising:

• executing, by the first compute node of the disaggregated computing architecture, a host operating system, the first compute node instantiating a first virtual machine executing a guest device driver for driving the physical device;
• accessing, by the guest device driver,
• one or more input registers of the physical device via a guest physical address range of first virtual machine;
• mapping, by a pass-through driver of the host operating system, the guest physical address range to a host physical address range of the host operating system;
• and
• mapping, by an interconnect interface of the first compute node, the host physical address range to a first uniform physical address range of the interconnection network for addressing the accelerator node.