Method to avoid cache access conflict between load and fill
AssigneeSamsung Electronics Co., Ltd.
InventorsTarun Nakra, Hao Wang, Paul Kitchin
Life of this patent
Estimating the term…
Abstract
According to one general aspect, an apparatus may include a first cache configured to store data. The apparatus may include a second cache configured to, in response to a fill request, supply the first cache with data, and an incoming fill signal. The apparatus may also include an execution circuit configured to, via a load request, retrieve data from the first cache. The first cache may be configured to: derive, from the incoming fill signal, address and timing information associated with the fill request, and based, at least partially, upon the address and timing information, schedule the load request to attempt to avoid a load-fill conflict.
Claims20
An apparatus comprising:
- a first cache configured to store data;
- a second cache configured to, in response to a fill request, supply the first cache with data, and an incoming fill signal;
- and
- an execution circuit configured to, via a load request, retrieve data from the first cache;
- wherein the first cache is configured to:
- derive, from the incoming fill signal, address and timing information associated with the fill request, and
- based, at least partially, upon the address and timing information, schedule the load request to attempt to avoid a load-fill conflict.
A system comprising:
- a processor circuit configured to:
- execute instructions associated with data, and
- retrieve, via a load request, data stored in a first cache;
- and
- a memory system comprising:
- the first cache configured to store data for the processor circuit, and
- a second cache configured to, in response to a fill request, supply the first cache with data, and an incoming fill signal;
- and
- wherein the first cache is configured to:
- derive, from the incoming fill signal, address and timing information associated with the fill request, and
- based, at least partially, upon the address and timing information, schedule the load request to attempt to avoid a load-fill conflict.
An apparatus comprising:
- a plurality of memory cells comprising a plurality of banks and ways, and configured to store data;
- and
- a load scheduler circuit configured to schedule when each of a plurality of load requests will be processed by the apparatus, wherein processing a load request comprises retrieving data from the plurality of memory cells;
- and
- wherein the load scheduler is further configured to:
- derive, from an incoming fill signal, address and timing information associated with a fill request, and
- based, at least partially, upon the address and timing information, schedule the plurality of load requests to attempt to avoid a load-fill conflict.
Dependencies are inferred from the claim text.