Memory system, memory controller for memory system, operation method of memory controller, and operation method of user device including memory device

A memory system, comprising:

• a nonvolatile memory;
• a memory controller comprising a write buffer for temporarily storing write data, received from a host device, to be stored in the nonvolatile memory, the memory controller being configured to transmit the write data from the write buffer to the nonvolatile memory;
• and
• the memory controller further being configured to transmit a write completion signal to the host device prior to successfully programming the write data into the nonvolatile memory and to release an operational status of the write buffer prior to confirmation of a successful write of the write data transmitted to the nonvolatile memory,
• wherein writing additional write data to the write buffer memory is prohibited prior to the release of the operational state of the write buffer, and writing of the additional write data to the write buffer is permitted after the release of the operational state of the write buffer.

A method, comprising:

• a first buffer memory of a memory controller temporarily storing write data, received from a host device, to be written to a nonvolatile memory;
• the memory controller transmitting the write data from the first buffer memory to the nonvolatile memory and to a second buffer memory having a lower operational speed and a higher memory capacity than the first buffer memory;
• and
• the memory controller transmitting a write completion signal to the host device prior to successfully programming the write data into the nonvolatile memory and releasing an operational state of the first buffer memory after transmitting the write data from the first buffer memory to the second buffer memory and to the nonvolatile memory,
• wherein writing of additional write data to the first buffer memory is prohibited prior to the release of the operational state of the first buffer memory, and writing of the additional write data to the first buffer memory is permitted after the release of the operational state of the first buffer memory.