Supporting multiple page lengths with unique error correction coding via galois field dimension folding
AssigneeAlibaba Group Holding Limited
InventorShu Li
Life of this patent
Estimating the term…
Abstract
Disclosed are methods and devices for supporting multiple page lengths with unique error correction coding via Galois field dimension folding. In one embodiment, a method comprises receiving a write instruction, the write instruction including user data; generating extended user data based on the user data, the extended user data including at least one symbol comprising a bit of the user data and a pre-stored bit pattern; generating parity data by encoding the extended user data; generating parity extension data by encoding the bit of the user data; writing a codeword to a page of a non-volatile memory device, the codeword including the parity extension data, the user data, and the parity data.
Claims22
A method comprising:
- receiving a write instruction, the write instruction including user data;
- generating extended user data based on the user data, the extended user data including at least one symbol comprising a bit of the user data and a known bit, the generating comprising interleaving a pre-stored bit pattern between bits of the user data;
- generating parity data by encoding the extended user data;
- generating parity extension data by encoding the bit of the user data;
- and
- writing a codeword to a page of a non-volatile memory device, the codeword including the parity extension data, the user data, and the parity data, the writing comprising discarding the known bit prior to writing the codeword to the page.
A method comprising:
- retrieving a codeword from a non-volatile memory device in response to a read instruction;
- identifying an extended symbol included in the codeword, the extended symbol comprising a symbol comprising a bit of user data and a known bit;
- hard decoding the extended symbol to obtain a decoded extended symbol;
- freezing the decoded extended symbol and setting a maximum confidence for the decoded extended symbol;
- generating a decoded codeword by performing a parity check of the codeword using a partial parity check matrix, the parity check comprising an iterative soft-decision decoding process;
- and
- generating decoded user data by dropping one or more inserted bits from the decoded codeword, the one or more inserted bits comprising a pre-stored bit pattern interleaved between bits of the user data.
A device comprising:
- a processor;
- a plurality of pages storing user data;
- a storage medium for tangibly storing thereon program logic for execution by the processor, the stored program logic comprising:
- logic, executed by the processor, for receiving a write instruction, the write instruction including user data;
- logic, executed by the processor, for generating extended user data based on the user data, the extended user data including at least one symbol comprising a bit of the user data and a known bit, the generating comprising interleaving a pre-stored bit pattern between bits of the user data;
- logic, executed by the processor, for generating parity data by encoding the extended user data;
- logic, executed by the processor, for generating parity extension data by encoding the bit of the user data;
- and
- logic, executed by the processor, for writing a codeword to a page of a non-volatile memory device, the codeword including the parity extension data, the user data, and the parity data, the writing comprising discarding the known bit prior to writing the codeword to the page.
Dependencies are inferred from the claim text.