Fast memory initialization
AssigneeIntel Corporation
InventorsMohan J. Kumar, George Vergis, Sarathy Jayakumar
Life of this patent
Estimating the term…
Abstract
In an example, there is disclosed a memory controller, including: a data buffer to drive a determinate value to a data bus to communicatively couple to a memory; and a register clock driver to: receive a memory initialization command from a processor; and incrementally step through a plurality of initialization addresses, sequentially driving each initialization address to an address bus to communicatively couple to the memory. There is also disclosed a computing device comprising the memory controller, and a method of initializing memory comprising incrementally stepping through a plurality of initialization addresses and sequentially writing a determinate value to each address.
Claims24
An apparatus, comprising:
- a first memory bank comprising a first memory module;
- a first data buffer coupled to the first memory bank;
- a second memory bank comprising a second memory module;
- a second data buffer coupled to the second memory bank;
- and
- a memory driver comprising circuitry, the memory driver communicatively coupled to the first memory module and the second memory module, the memory driver to:
- receive a memory initialization command from a processor;
- responsive to the memory initialization command, scramble a plurality of addresses of the first memory module and the second memory module and incrementally step through the plurality of scrambled addresses, writing one or more determinate values to the plurality of scrambled addresses, wherein writing one or more determinate values to the plurality of scrambled addresses comprises simultaneously writing contents of the first data buffer to the first memory module of the first memory bank and writing contents of the second data buffer to the second memory module of the second memory bank;
- and
- receive a hash key from the processor and use the hash key to generate the plurality of scrambled addresses responsive to the memory initialization command.
A memory driver, comprising:
- a first data buffer to couple to a first memory module of a first memory bank;
- a second data buffer to couple to a second memory module of a second memory bank;
- and
- a register clock driver to:
- receive a memory initialization command from a processor;
- responsive to the memory initialization command, scramble a plurality of addresses of the first memory module and the second memory module and incrementally step through the plurality of scrambled addresses, writing one or more determinate values to the plurality of scrambled addresses, wherein writing one or more determinate values to the plurality of scrambled addresses comprises simultaneously writing contents of the first data buffer to the first memory module of the first memory bank and writing contents of the second data buffer to the second memory module of the second memory bank;
- and
- receive a hash key from the processor and use the hash key to generate the plurality of scrambled addresses responsive to the memory initialization command.
A computer-implemented method of initializing a plurality of memory modules, comprising:
- receiving a memory initialization command from a processor;
- responsive to the memory initialization command, scrambling a plurality of addresses of a first memory module of a first memory bank and a second memory module of a second memory bank, incrementally stepping through the plurality of scrambled addresses, and writing one or more determinate values to the plurality of scrambled addresses, wherein writing one or more determinate values to the plurality of scrambled addresses comprises simultaneously writing contents of a first data buffer to the first memory module of the first memory bank and writing contents of a second data buffer to the second memory module of the second memory bank;
- and
- receiving a hash key from the processor and using the hash key to generate the plurality of scrambled addresses responsive to the memory initialization command.
Dependencies are inferred from the claim text.