Silicon-on-insulator (SOI) die including a light emitting layer pedestal-aligned with a light receiving segment

A method comprising:

• providing a silicon-on-insulator (SOI) die having an integrated circuit (IC) region and a pedestal region, said pedestal region including an interconnect metal segment for use as a metal hard mask, said metal hard mask being below upper dielectric layers and above lower dielectric layers, said IC region including a thin silicon waveguide;
• forming photoresist to protect said IC region and to expose said pedestal region;
• etching said upper dielectric layers above said metal hard mask;
• removing said metal hard mask;
• etching trenches so as to form a handle wafer segment below said lower dielectric layers;
• using a thin top silicon segment in said pedestal region as an etch stop to etch said lower dielectric layers, thereby forming a pedestal comprising said thin top silicon segment, a buried oxide (BOX) segment, and said handle wafer segment, said thin top silicon segment in said pedestal region being aligned with said thin silicon waveguide in said IC region.