External DQS bi-directional loopback with use of feed forward equalization path
AssigneeCavium, Inc.
InventorsDavid Da-Wei Lin, Edward Wade Thoenes
Life of this patent
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Abstract
A byte lane of an integrated circuit including two data strobe loopback paths that allow external test signals to flow in and out of the integrated circuit through data strobe pins in two opposite directions. The integrated circuit includes a Feed Forward Equalization (FFE) path configured to send FFE signals output from the FFE logic via a transmitter set to a first data strobe interface during a normal operation. In a loopback test mode operation, a test signal can be supplied from a second data strobe interface and output to the first data strobe interface by reusing the FFE path. The second loopback path conversely allows a test signal to be routed from the first data strobe interface to the second.
Claims21
An integrated circuit comprising:
- a first data strobe interface and a second data strobe interface configured to be coupled to an external bus to receive and transmit data strobe signals;
- feed forward equalization (FFE) logic configured to generate FFE signals based on data signals;
- a transmitter circuit coupled to said FFE logic through a first signal path for transmitting equalized signals to said second data strobe interface, wherein an equalized signal of said equalized signals is a combination of a data signal of said data signals and an FFE signal of said FFE signals;
- and
- a first external path configured to route loopback test signals from said first data strobe interface to said second data strobe interface through said first signal path.
A memory controller comprising:
- interface circuitry;
- and
- memory control logic configured to manage data flow with a memory storage device via said interface circuitry, wherein said interface circuitry comprises:
- data interfaces configured to be coupled to an external bus and receive and transmit data signals;
- a first data strobe interface and a second data strobe interface configured to be coupled to said external bus and receive and transmit data strobe signals, wherein said first data strobe interface and said second data strobe interface are further configured to receive and transmit loopback test signals;
- feed forward equalization (FFE) logic configured to generate FFE signals based on said data signals;
- a first data path coupled between said FFE logic and said second data strobe interface;
- a first external path comprising said first data path and configured to transport said loopback test signals from said first data strobe interface to said second data strobe interface;
- and
- a second external path configured to transport said loopback test signals from said second data strobe interface to said first data strobe interface.
A method of performing external tests on an integrated circuit, wherein said method comprises:
- receiving a test signal at a first data strobe interface of said integrated circuit;
- sending said test signal to a first receiver coupled to said first data strobe interface;
- sending said test signal from said first receiver to an input of a first multiplexer, wherein said first multiplexer comprises:
- another input coupled to an output of Feed Forward Equalization (FFE) logic;
- and an output coupled to a first transmitter set;
- sending a select signal to said first multiplexer, wherein said select signal is operable to control said first multiplexer to output said test signal;
- sending said test signal from said multiplexer to said first transmitter set;
- sending said test signal from an output of said first transmitter set to a second data strobe interface of said integrated circuit;
- and
- analyzing said test signal received from an output of said second data strobe interface against said test signal received at said first data strobe interface.
Dependencies are inferred from the claim text.