Asynchronous data recovery
AssigneeSiliconIntervention Inc.
InventorsA. Martin Mallinson, Christian Leth Petersen
Life of this patent
Estimating the term…
Abstract
Described herein is an apparatus for the recovery of asynchronous data into a fixed clock domain. A phase-locked loop (PLL) of the known art is replaced by a modified quadrature resolver, and the output from the resolver re-creates the selected frequency component of the input asynchronous data. The zero-crossings of this re-created data clock are used to sample the input data stream. One advantage of this technique is that it operates as a state machine on a single clock, and no analog components such as phase detectors or VCOs are needed. In another embodiment, the samples from the input data stream are changed from pulses to Gaussians, allowing for conversion of the sample rate from one clock domain to another.
Claims14
A circuit comprising:
- an oscillator having a sine output configured to provide a sine signal at an expected frequency of an input signal and a cosine output configured to provide a cosine signal at the expected frequency of the input signal;
- a first multiplier having a first input coupled to the sine output of the oscillator and a second input configured to receive the input signal, and an output configured to provide a product of the sine signal and the input signal;
- a second multiplier having a first input coupled to the cosine output of the oscillator and a second input configured to receive the input signal, and an output configured to provide a product of the cosine signal and the input signal;
- a first low pass filter having an input coupled to the first multiplier and an output configured to provide a first filtered signal;
- a second low pass filter having an input coupled to the second multiplier and an output configured to provide a second filtered signal;
- a third multiplier having a first input coupled to the sine output of the oscillator and a second input coupled to the output of the first low pass filter, and an output configured to provide a product of the sine signal and the first filtered signal;
- a fourth multiplier having a first input coupled to the cosine output of the oscillator and a second input coupled to the output of the second low pass filter, and an output configured to provide a product of the cosine signal and the second filtered signal;
- and
- an adder having a first input coupled to the output of the third multiplier and a second input coupled to the output of the fourth multiplier, and an output configured to provide a sum of the output of the third multiplier and the output of the fourth multiplier.
Dependencies are inferred from the claim text.