Memory device

A memory device, comprising:

• a first memory array, comprising a plurality of first memory units;
• a second memory array, comprising a plurality of second memory units;
• a first bit line driving circuit, configured to interpret a first memory bit line address and to drive a first bit line;
• a second bit line driving circuit, configured to interpret a second memory bit line address and to drive a second bit line;
• a first word line driving circuit, configured to interpret a first memory word line address and to drive a first word line;
• a second word line driving circuit, configured to interpret a second memory word line address and to drive a second word line;
• a read/write circuit, coupled to the first bit line driving circuit and the second bit line driving circuit, and configured to read, set or reset the first memory units and the second memory units;
• a controller, configured to switch the first memory array and the second memory array to work in a single memory unit mode or a dual memory unit mode;
• a first reference driving circuit, configured to drive a first reference line, the first reference line comprises a plurality of first reference units, and the first reference line and the first reference units are located in the first memory array;
• and
• a second reference driving circuit, configured to drive a second reference line, the second reference line comprises a plurality of second reference units, and the second reference line and the second reference units are located in the second memory array.