Binary-to-gray conversion circuit, related FIFO memory, integrated circuit and method
AssigneeSTMicroelectronics S.r.l.
InventorsSalvatore Marco Rosselli, Giuseppe Guarnaccia
Life of this patent
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Abstract
A circuit and method for performing a Binary-to-Gray conversion are disclosed. A first binary signal represents a target value and a second binary signal is stored in a register. A set of binary candidate values are determined where the respective Gray equivalent of each binary candidate value has a Hamming distance of one from the Gray equivalent of the second binary value. One of the binary candidate values is selected as a function of the first binary signal and the second binary signal. The selected binary candidate value is provided at input to the register. An encoded signal is generated by determining the Gray encoded equivalent of the selected binary candidate value.
Claims21
A binary-to-gray conversion circuit, comprising:
- an input configured to receive a first binary signal;
- a register configured to store a second binary signal;
- a prediction circuit configured to receive the second binary signal and to provide a set of binary candidate values, wherein a respective Gray equivalent of each binary candidate value has a Hamming distance of one from a Gray equivalent of the second binary signal;
- an arbiter configured to select one of the binary candidate values as a function of the first binary signal and the second binary signal, wherein the selected binary candidate value is provided to the register;
- and
- an encoder block configured to receive the selected binary candidate value and output a Gray encoded equivalent of the selected binary candidate value.
A FIFO memory comprising:
- a memory area comprising a plurality of memory locations;
- a write interface configured to generate a binary write pointer indicating a memory location for writing data to the memory area;
- a read interface configured to generate a binary read pointer indicating a memory location for reading data from the memory area;
- a synchronization circuit configured to exchange the binary write pointer or the binary read pointer between the write interface and the read interface, wherein the synchronization circuit is configured to exchange Gray coded signals;
- and
- a binary-to-gray conversion circuit configured to receive the binary write pointer or the binary read pointer, wherein a Gray encoded equivalent of a binary candidate value determined by the Binary-to-Gray conversion circuit is provided to the synchronization circuit.
A method of performing a Binary-to-Gray conversion, the method comprising:
- receiving a first binary signal representing a target value;
- storing a second binary signal in a register;
- determining a set of binary candidate values, wherein the Gray equivalent of each respective binary candidate value has a Hamming distance of one from the Gray equivalent of the second binary value;
- selecting one of the binary candidate values as a function of the first binary signal and the second binary signal, wherein the selected binary candidate value is provided at input to the register;
- and
- generating an encoded signal by determining the Gray encoded equivalent of the selected binary candidate value.
Dependencies are inferred from the claim text.