Method for biasing outputs of a folded cascode stage in a comparator and corresponding comparator

An integrated circuit comprising a comparator configured to generate an output signal representative of a comparison between input values, the comparator comprising a folded cascode stage having a positive output and a negative output, the folded cascode stage comprising:

• a regulation circuit configured to regulate voltages on the positive output and on the negative output, the regulation circuit comprising resistive elements coupled between the positive output and the negative output, wherein a common-mode node configured to have a constant common-mode voltage is coupled between the resistive elements;
• a compensation circuit comprising a first current generator configured to generate a compensation current in the resistive elements to compensate a difference between effective threshold values of a pair of transistors of the comparator, wherein the pair of transistors is coupled upstream of the folded cascode stage;
• and
• a hysteresis circuit comprising a second current generator configured to generate, in a manner controlled by a hysteresis control signal, a hysteresis current in the resistive elements to introduce a hysteresis offset to the input values to generate the output signal of the comparator.

A circuit comprising:

• first and second inputs configured to receive respectively first and second input signals;
• a comparator output configured to produce an output signal based on a difference between the first and second input signals and a hysteresis offset;
• a folded cascode stage coupled between the first and second inputs and the comparator output, the folded cascode stage comprising:
• first and second outputs configured to produce respectively first and second output signals;
• a first differential pair of a first type coupled between the first and second outputs and a first supply terminal;
• a second differential pair of a second type coupled between the first and second outputs and a second supply terminal;
• first and second resistors coupled between the first and second outputs;
• a first current generator configured to generate a compensation current flowing through the first and second resistors;
• and
• a second current generator configured to generate a hysteresis current flowing through first and second resistors to introduce the hysteresis offset.