Semiconductor process and performance sensor

A performance sensor apparatus, comprising:

• a plurality of timing paths, wherein each timing path has an input and an output, and wherein each timing path is representative of a path in a semiconductor circuit, each timing path associated with a particular parameter dependent on one or more of a temperature or a semiconductor process;
• a logic circuit having a plurality of inputs and at least one output, wherein the output from each of the timing paths is coupled to an input of the logic circuit;
• a trigger circuit having a clock input obtained from the output of the logic circuit;
• and
• a timing circuit having an input that is related to the output of the logic circuit and having an output that changes from a first level to a second level upon a determination that a timing requirement for at least one of the timing paths is not met, the performance sensor apparatus further including a clock adjustment circuit including:
• an input configured to receive a system clock,
• a launch clock output coupled to each of the timing paths, and
• a capture clock output coupled to a clock input of the timing circuit, wherein the clock adjustment circuit is configured to apply one or more of a clock skew adjustment, clock inversion or a margin adjustment in generating the launch clock or the capture clock.

A system for sensing performance of a semiconductor circuit, the system comprising:

• a performance sensor, comprising:
• a system clock input configured to receive a clock signal,
• a plurality of timing paths, wherein each timing path has an input and an output, each timing path is representative of a path in a semiconductor circuit and each timing path is associated with a particular parameter dependent on one or more of a temperature or a semiconductor process,
• a logic circuit having a plurality of inputs and at least one output, wherein the output from each of the timing paths is coupled to an input of the logic circuit,
• a trigger circuit having a clock input obtained from the output of the logic circuit, and
• a timing circuit having an input that is related to the output of the logic circuit and having an output that changes from a first level to a second level upon a determination that a timing requirement for at least one of the timing paths is not met;
• and
• a voltage regulator circuit coupled to the output of the performance sensor, the voltage regulator configured to receive a supply voltage and to adjust a value of the supply voltage provided to the semiconductor circuit based on the output of the performance sensor.