FPGA configuration cell utilizing NVM technology and redundancy
AssigneeMicrosemi SoC Corporation
InventorJohn L. McCollum
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory cell includes a first voltage supply node, a second voltage supply node, an output node, a resistive random access memory device having a first electrode and a second electrode, the first electrode connected to the first voltage supply node, at least one p-channel transistor connected between the second electrode of the resistive random access memory device and the output node, at least one n-channel transistor connected between the output node and the second voltage supply node, and an inverter connected between the output node and a gate of the at least one n-channel transistor.
Claims18
A nonvolatile memory cell comprising:
- a first voltage supply node;
- a second voltage supply node;
- an output node;
- a first resistive random access memory device having a first electrode and a second electrode, the first electrode connected to the first voltage supply node;
- at least one first p-channel transistor connected between the second electrode of the first resistive random access memory device and the output node;
- at least one n-channel transistor connected between the output node and the second voltage supply node;
- and
- an inverter connected between the output node and a gate of the at least one n-channel transistor.
In a ReRAM configuration memory cell having a ReRAM device connected in series with at least one p-channel transistor formed in an n-well and connected between a voltage supply potential and an output node, a method for protecting the memory cell from a state change caused by a particle strike comprising:
- biasing the n-well at the voltage supply potential through the ReRAM device.
Dependencies are inferred from the claim text.