US 10,599,404 B1 · M/A for compiling parallel program having barrier synchronization for programmable hardware

Abstract

A method of compiling program code includes determining if the program code controls a programmable logic device to execute other program code. The program code is a parallel program having a barrier function call for a group of threads. If it is determined that program code is to control the programmable logic device, then the program code is transformed by replacing the barrier function call with control logic inserted into the program code such that the transformed program code remains a parallel program and maintains synchronization among the group of threads. A compiler system that compiles program code with a barrier function call for a group of threads is also described.

Claims27

Dependent claims

A method of compiling a first program code, the method comprising:

determining if the first program code is to program a programmable logic device to execute a second program code, wherein the first program code is a parallel program having a barrier function call for a group of threads;
and
transforming the first program code by replacing the barrier function call with additional hardware control logic specified to be programmed into the programmable logic device to form a transformed program in response to determining that the first program code is to program the programmable logic device, wherein the transformed program code remains a parallel program and maintains synchronization among the group of threads.

A compiler system, comprising:

a processor having:
compiler modules that compile a parallel first program code with a barrier function call for a group of threads, wherein the first program code is to program a programmable logic device to execute a second program code;
and
barrier synchronization logic generator within the compiler modules to replace the barrier function call with additional hardware control logic specified to be programmed into the programmable logic device to form a transformed program when the compiler modules determine that the first program code is to programs the programmable logic device to execute the second program code, wherein the transformed program code remains a parallel program and maintains synchronization among the group of threads.

1 more element

A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method of compiling a first program code comprising:

determining if the first program code is to program a programmable logic device to execute a second program code, wherein the first program code is a parallel program having a barrier function call for a group of threads;
transforming the first program code by replacing the barrier function call with additional hardware control logic specified to be programmed into the programmable logic device to form a transformed program in response to determining that the first program code is to programs the programmable logic device, wherein the transformed program code remains a parallel program and maintains synchronization among the group of threads.

Dependencies are inferred from the claim text.

M/A for compiling parallel program having barrier synchronization for programmable hardware

Life of this patent

M/A for compiling parallel program having barrier synchronization for programmable hardware

Life of this patent

Abstract

Claims27