High speed serial link for video interfaces

A data communication apparatus including a transmitter circuit for communicating data via a serial link with a receiver, the transmitter circuit comprising:

• a transmitter input including multiple input data lanes and a clock lane, wherein the transmitter input is configured to concurrently receive data on the multiple input data lanes aligned with a clock signal received on the clock lane according to a multi-lane communication protocol,
• a transmitter output interface to the serial link, wherein the output interface is a clock-less interface and includes a number of output data lanes less than a number of the multiple input data lanes;
• and
• transmitter translation circuitry configured to translate the data received according to the multi-lane communication protocol to a serial link communication protocol for transmission on the serial link, including translating data received according to a high definition multi-media interface (HDMI) protocol to the serial link communication protocol;
• and removing HDMI-specific characters in the received data and adding alignment characters to the received data to be transmitted according to the serial link communication protocol.

An apparatus for communicating data via a serial link, the apparatus comprising:

• means for receiving data on multiple data lanes of the apparatus according to a first communication protocol that includes a high definition multi-media interface (HDMI) protocol, wherein the first communication protocol includes receiving the data on the multiple data lanes concurrently and aligned with a clock signal received on a clock lane;
• means for removing HDMI-specific characters in the received data and adding alignment characters to the received data to be transmitted according to a second communication protocol;
• means for transmitting the received data from the transmitter to a receiver of the serial link according to the second communication protocol, where the second communication protocol excludes the clock signal and includes transmitting the received data via the serial link using less data lanes than the first communication protocol;
• and
• means for receiving the transmitted data at the receiver of the serial link and recovering the multiple data lanes and the clock signal of the first communication protocol from the received transmitted data.