US 10,594,523 B2 · Decoder circuit for a broadband pulse amplitude modulation signal

Abstract

Disclosed is a decoder circuit for a pulse amplitude modulation signal and a method of decoding a pulse amplitude modulation signal. The pulse amplitude modulation signal has a zeroth signal level, a first signal level, a second signal level and a third signal level. The decoder circuit comprises a first decision circuit, and a mapping circuit. The first decision circuit receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level. The mapping circuit receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level. Optionally, the decoder circuit comprises a logic circuit. The logic circuit receives the generated signal of the mapping circuit and the generated signal of the first decision circuit and generates a low output signal or a high output signal according to a predetermined truth table.

Claims22

Dependent claims

A decoder circuit for decoding a pulse amplitude modulation signal having a zeroth signal level, a first signal level, a second signal level and a third signal level, wherein the first signal level is larger than the zeroth signal level, wherein the second signal level is larger than the first signal level, and wherein the third signal level is larger than second signal level, the decoder circuit comprising:

a first decision circuit, which receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level, and
a mapping circuit, which receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level,
wherein the mapping circuit includes a rectifier circuit and a second decision circuit, wherein the rectifier circuit receives the pulse amplitude modulation signal and generates a rectified signal with respect to a threshold between the first signal level and the second signal level, wherein the rectified signal is the output of the rectifier circuit, wherein the second decision circuit receives the rectified signal and generates the low output signal and the high output signal.

A method of decoding a pulse amplitude modulation signal having a zeroth signal level, a first signal level, a second signal level and a third signal level, wherein the first signal level is larger than the zeroth signal level, wherein the second signal level is larger than the first signal level, and wherein the third signal level is larger than second signal level, the method comprising:

a first step of receiving the pulse amplitude modulation signal and generating a low output signal for the first and the zeroth signal level, and generating a high output signal for the third and the second signal level, and
a second step of receiving the pulse amplitude modulation signal and generating a low output signal for the second and first signal level, and generating a high output signal for the third and zeroth signal level,
wherein the second step includes receiving the pulse amplitude modulation signal and generating a rectified signal with respect to a threshold between the first signal level and the second signal level, wherein the rectified signal is the output of a rectifier circuit, and wherein the second step further includes receiving the rectified signal and generating the low output signal and the high output signal.

Dependencies are inferred from the claim text.

Decoder circuit for a broadband pulse amplitude modulation signal

Life of this patent

Decoder circuit for a broadband pulse amplitude modulation signal

Life of this patent

Abstract

Claims22