A fractional-N Phase-Locked Loop (PLL) with non-linear-error correction comprising:
- a Time-to-Digital Converter (TDC) that receives a reference clock and a feedback clock and generates a TDC output, the TDC output being a digital value of a phase difference detected by the TDC between the reference clock and the feedback clock;
- a loop filter that receives a residual error signal and generates an oscillator control signal by applying a digital filter to the residual error signal;
- an oscillator that is controlled by the oscillator control signal and generates an output clock having a frequency determined by the oscillator control signal;
- a feedback divider that divides the output clock by a divisor to generate a divided clock;
- a modulator that generates a modulation signal to the feedback divider, the modulation signal dithering the divisor of the feedback divider to divide the output clock by an effective divisor with both an integer part and a fractional part, the fractional part being between 0 and 1;
- a modulation accumulator that accumulates differences in the modulation signal to generate a phase control signal that is an accumulated quantized error of the modulator;
- a gain calibrator that receives the residual error signal and the phase control signal, the gain calibrator minimizing an error to generate a gain adjustment;
- a gain subtractor that subtracts the gain adjustment from a first signal in the PLL to cancel fractional divider phase quantization noise;
- a non-linear-error subtractor that subtracts a non-linear-error adjustment from a second signal in the PLL to compensate for non-linear errors that are not compensated for by the gain adjustment;
- an orthogonal kernel generator that receives the phase control signal and generates a plurality of orthogonal kernels from the phase control signal;
- a correlator with a plurality of paths, wherein each path correlates an orthogonal kernel signal generated by the orthogonal kernel generator to the residual error signal to set a corresponding kernel coefficient adaptively;
- a compensation function constructor that receives a plurality of the corresponding kernel coefficient generated by the correlator and performs an inverse transform to generate an updated compensation function, the updated compensation function operating upon a range of values of the phase control signal to generate a plurality of result values;
- a lookup table for storing a plurality of stored results, the stored results being the result values generated by the compensation function constructor and stored in the lookup table;
- and
- an interpolator that receives two or more stored results read from the lookup table in response to most-significant bits (MSBs) of the phase control signal, the interpolator using at least one least-significant bit (LSB) of the phase control signal to interpolate between the two or more stored results read from the lookup table to generate the non-linear-error adjustment sent to the non-linear-error subtractor.