Automatic gain control (AGC) circuit, despreading circuit, and method for reproducing reception data

A de-spreading circuit comprising:

• an automatic gain control circuit comprising:
• a reference level calculator configured to calculate a reference level of bit width conversion based on an amplitude of a reception signal;
• a register configured to store an adjustment value;
• a reference level adjuster configured to adjust said reference level calculated by said reference level calculator based on the adjustment value stored in the register to generate an adjusted reference level lower than the reference level;
• a bit width conversion circuit configured to perform a bit width conversion by dividing the amplitude of the reception signal and changing borders for the dividing of the amplitude of the reception signal in accordance with the adjustment of the reference level performed by the reference level adjuster;
• a correlator configured to generate a correlation value signal representing a correlation value between a bit width converted signal whose bit width has been converted by the bit width conversion circuit and a spreading sequence:
• a comparison circuit configured to perform a comparison between the correlation value and a threshold value, to generate a comparison signal representing a comparison result;
• a synchronization control circuit configured to generate a synchronous signal based on the comparison signal;
• and
• a symbol timing generation circuit configured to generate a symbol timing signal representing a symbol timing and a reception clock based on the synchronous signal and the comparison signal;
• and a data reproduction circuit configured to generate reception data based on the correlation value signal and the symbol timing signal.

A method for reproducing reception data comprising:

• calculating a reference eve of bit width conversion based on an amplitude of a reception signal;
• holding a plurality of adjustment values for the calculated reference level;
• receiving a synchronous signal of the reception signal;
• in an asynchronous state to the reception signal, selecting a first adjustment value from the adjustment values, and generating an adjusted reference level by subtracting the first adjustment value from the calculated reference level;
• in a synchronous state to the reception signal in response to the synchronous signal, selecting a second adjustment value greater than the first adjustment value from the adjustment values, and
• generating an adjusted reference level by subtracting the second adjustment value from the calculated reference level;
• performing a bit width conversion by dividing the amplitude of the reception signal, and changing borders for the dividing of the amplitude of the reception signal in accordance with the adjustment of the reference level, to generate a bit width converted signal;
• generating a correlation value signal representing a correlation value between the bit width converted signal and a spreading sequence;
• making a comparison between the correlation value and a threshold value, to generate a comparison signal representing a comparison result;
• generating a synchronous signal based on the comparison signal;
• generating a symbol timing signal representing a symbol timing and a reception clock based on the synchronous and the comparison signal;
• and
• generating the reception data based on the correlation value signal and the symbol timing signal.

An automatic gain control circuit for controlling a gain of a wireless receiver in accordance with an amplitude of a reception signal, the automatic gain control circuit comprising:

• a reference level calculator configured to calculate a reference level of bit width conversion based on a summation signal which is obtained by summing up a square of an amplitude of an in-phase signal of reception signal and the square of an amplitude, of a quadrature signal of the reception signal;
• a register configured to store an adjustment value;
• a reference level adjuster configured to adjust said reference level calculated by said reference level calculator based on the adjustment value stored in the register to generate an adjusted reference level;
• and
• a bit width conversion circuit configured to perform a bit width conversion by dividing the amplitude of the reception signal in accordance with said reference level adjusted by the reference level adjuster.