RF switches, integrated circuits, and devices with multi-gate field effect transistors and voltage leveling circuits, and methods of their fabrication
AssigneeNXP USA, Inc.
InventorVenkata Naga Koushik Malladi
Life of this patent
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Abstract
Embodiments of field effect transistor (FET) circuits, RF switches, and devices include source and drain terminals coupled to an active surface of a semiconductor substrate, a channel in the substrate between the source and drain terminals, and a plurality of gate structures coupled to the active surface over the channel. A channel contact is coupled to the active surface over the channel between a pair of the gate structures. A first capacitor is electrically coupled between the channel contact and the source terminal, and a second capacitor is electrically coupled between the channel contact and the drain terminal.
Claims20
A method of fabricating a field effect transistor (FET) circuit, the method comprising:
- forming a FET in and over an active surface of a semiconductor substrate by
- coupling a source terminal to the active surface,
- coupling a drain terminal to the active surface, wherein a multi-gate FET channel is present in the semiconductor substrate between the source and drain terminals, and
- coupling a plurality of gate structures to the active surface over the multi-gate FET channel;
- coupling a first channel contact to the active surface over the multi-gate FET channel between a first pair of gate structures of the plurality of gate structures;
- electrically coupling a first capacitor between the first channel contact and the source terminal;
- and
- electrically coupling a second capacitor between the first channel contact and the drain terminal.
A method of fabricating a radio frequency switch, the method comprising:
- electrically coupling a first field effect transistor (FET) between an antenna node and a first transmit/receive (T/R) node, wherein the first FET includes
- a semiconductor substrate with an active surface,
- a source terminal coupled to the active surface,
- a drain terminal coupled to the active surface,
- a multi-gate FET channel in the semiconductor substrate between the source and drain terminals, and
- a plurality of gate structures coupled to the active surface over the multi-gate FET channel;
- coupling a first channel contact to the active surface over the multi-gate FET channel between a first pair of gate structures of the plurality of gate structures;
- electrically coupling a first capacitor between the first channel contact and the source terminal;
- and
- electrically coupling a second capacitor between the first channel contact and the drain terminal.
Dependencies are inferred from the claim text.