Method for forming source/drain contacts

A method for forming a source contact and a drain contact in a semiconductor structure, comprising:

• providing a semiconductor structure comprising:
• a semiconductor active area comprising a channel region, a source region, and a drain region, wherein the source region and the drain region each has a top surface;
• a gate structure on the channel region, wherein the gate structure has a top surface and side walls;
• a gate plug on the top surface of the gate structure, wherein the gate plug has side walls;
• spacers lining the side walls of the gate structure and the side walls of the gate plug;
• an etch stop layer covering the top surface of the source region and the top surface of the drain region;
• a sacrificial material on the etch stop layer over the source region and the drain region and other parts of the semiconductor structure;
• and
• a masking structure masking the source region and the drain region while leaving the other parts of the semiconductor structure unmasked;
• forming gaps by selectively removing the sacrificial material present on the other parts of the semiconductor structure;
• removing all or part of the masking structure;
• filling the gaps by depositing a dielectric layer on the semiconductor structure;
• exposing the sacrificial material present on the etch stop layer over the source region and the drain region;
• selectively removing, by a wet etching process, the sacrificial material present on the etch stop layer over the source region and the drain region;
• selectively removing, by a wet etching process, the etch stop layer covering the top surface of the source region and the top surface of the drain region to such an extent as to expose the top surface of the source region and the top surface of the drain region;
• forming the source contact and the drain contact in the semiconductor structure by depositing a conductive material on the source region and the drain region,
• wherein a material of the gate plug, a material of the spacers, the sacrificial material, a material of the etch stop layer, a material of the dielectric layer, and a material of the source region and the drain region are selected such that:
• the sacrificial material etches faster than the material of the gate plug, the material of the spacers, the material of the etch stop layer, and the material of the dielectric layer during the selective removal of the sacrificial material present on the etch stop layer;
• the etch stop layer is entirely removable without entirely removing the gate plug;
• and
• the material of the etch stop layer etches faster than the material of the spacers, the material of the dielectric layer, and the material of the source region and the drain region during the selective removal of the etch stop layer covering the top surface of the source region and the top surface of the drain region.