Power semiconductor device and method for manufacturing the same

A method for manufacturing a power semiconductor device, the method comprising:

• forming a first trench and a second trench in a semiconductor substrate, such that a mesa region is defined between the first trench and the second trench;
• forming a gate insulation film and a gate electrode in each of the first and second trenches;
• implanting a first conductivity type impurity into the semiconductor substrate to form a first conductivity type body region;
• implanting a second conductivity type impurity into the first conductivity type body region to form a second conductivity type source region at an upper portion and a side portion of the mesa region;
• forming an interlayer insulation film on the mesa region and the gate electrode;
• performing a first etching of the interlayer insulation film to expose the upper portion of the mesa region, such that a top surface of the interlayer insulation film is substantially coplanar with the upper portion of the mesa region;
• implanting the first conductivity type impurity into the upper portion of the mesa region to form a first conductivity type body contact region, such that the second conductivity type source region is separated into a first portion of the second conductivity type source region and a second portion of the second conductivity type source region, in the mesa region;
• performing a second etching of the interlayer insulation film to expose the second conductivity type source region and the side portion of the mesa region, wherein the top surface of the interlayer insulation film is not substantially coplanar with the upper portion of the mesa region;
• and
• forming a source metal in contact with the second conductivity type source region and the first conductivity type body contact region.