Display panel and method of fabricating the same
AssigneeSamsung Display Co., Ltd.
InventorsKyoungseok Son, Myounghwa Kim, Eoksu Kim, Taesang Kim, Masataka Kano
Life of this patent
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Abstract
A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.
Claims21
A method of fabricating a display panel, comprising:
- forming a silicon semiconductor pattern on a base layer including a first region and a second region that is extended from the first region, the silicon semiconductor pattern overlapping the first region;
- forming a first control electrode on the silicon semiconductor pattern, the first control electrode overlapping the silicon semiconductor pattern with a first insulating layer interposed therebetween;
- forming a second control electrode to overlap the first region and to be spaced apart from the first control electrode with a second insulating layer interposed therebetween;
- forming an oxide semiconductor pattern on the second control electrode to overlap the second control electrode with a third insulating layer interposed therebetween;
- etching the first, second, and third insulating layers to form a first contact hole and a second contact hole exposing at least a portion of the silicon semiconductor pattern and a first groove that overlaps the second region;
- forming on the third insulating layer a first input electrode and a first output electrode that are connected to the silicon semiconductor pattern through the first and second contact holes, and a second input electrode and a second output electrode that are connected to the oxide semiconductor pattern;
- forming a fourth insulating layer on the third insulating layer to cover the first input electrode, the first output electrode, the second input electrode, and the second output electrode;
- thermally treating the fourth insulating layer at a controlled temperature prior to forming any layer on the fourth insulating layer;
- forming an organic layer to cover the fourth insulating layer;
- and
- forming on the organic layer an organic light emitting diode that is connected to the first output electrode.
A display panel, comprising:
- a base layer including a first region and a second region that is bent from the first region along a predetermined bending axis;
- a first thin-film transistor provided in the first region, the first thin-film transistor comprising a crystalline silicon semiconductor pattern, a first control electrode, and a first input electrode and a first output electrode that are coupled to the crystalline silicon semiconductor pattern and are spaced apart from each other with the first control electrode interposed therebetween;
- a second thin-film transistor disposed in the first region to have a bottom gate structure, the second thin-film transistor comprising a second control electrode, an oxide semiconductor pattern disposed on the second control electrode, and a second input electrode and a second output electrode that are in contact with the oxide semiconductor pattern and are spaced apart from each other;
- a passivation layer disposed in the first region and the second region to cover the first thin-film transistor and the second thin-film transistor and to include a first groove that overlaps the second region;
- a plurality of inorganic layers disposed between the passivation layer and the base layer to include a second groove that overlaps the first groove;
- an organic layer disposed in the first region and the second region and on the passivation layer to cover inner surfaces of the first and second grooves;
- and
- an organic light emitting diode disposed on the organic layer and in the first region and electrically connected to the first thin-film transistor,
- wherein a plurality of inorganic layers are disposed to expose a portion of a top surface of the base layer, and the organic layer is disposed to be in contact with the portion of the top surface of the base layer.
A display panel comprising:
- a base layer including a first region and a second region that is bent from the first region along a predetermined bending axis;
- a first thin-film transistor provided in the first region, the first thin-film transistor comprising a crystalline silicon semiconductor pattern, a first control electrode, and a first input electrode and a first output electrode that are coupled to the crystalline silicon semiconductor pattern and are spaced apart from each other with the first control electrode interposed therebetween;
- a second thin-film transistor disposed in the first region to have a bottom gate structure, the second thin-film transistor comprising a second control electrode, an oxide semiconductor pattern disposed on the second control electrode, and a second input electrode and a second output electrode that are in contact with the oxide semiconductor pattern and are spaced apart from each other;
- a passivation layer disposed in the first region and the second region to cover the first thin-film transistor and the second thin-film transistor and to include a first groove that overlaps the second region;
- a plurality of inorganic layers disposed between the passivation layer and the base layer to include a second groove that overlaps the first groove;
- an organic layer disposed in the first region and the second region and on the passivation layer to cover inner surfaces of the first and second grooves;
- an organic light emitting diode disposed on the organic layer and in the first region and electrically connected to the first thin-film transistor;
- and
- a signal line that is disposed in the second region and overlapping the first groove and the second groove,
- wherein each of etch rates of the second input electrode and the second output electrode that are etched by a fluoro compound are higher than that of the oxide semiconductor pattern, and
- wherein the signal line is disposed on the same layer as the second output electrode.
Dependencies are inferred from the claim text.