Printed electronic devices exhibiting improved yield

A printed electronic device comprising:

• a plurality of contact pads arranged in a pattern,
• a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, and
• a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers,
• wherein the plurality of contact pads comprises at least one unmodified contact pad having a surface area, shape and size, the plurality of contact pads further comprising at least one modified contact pad having a reduced surface area, and a different size, a different shape, or both, as compared to the at least one unmodified contact pad, wherein the plurality of contact pads comprises multiple modified contact pads comprising at least one irregular pentagonal shaped contact pad and at least one irregular hexagonal shaped contact pad.

A printed electronic device comprising:

• a plurality of contact pads arranged in a pattern,
• a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, and
• a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers,
• wherein the plurality of contact pads comprises at least one unmodified contact pad having a surface area, shape and size, the plurality of contact pads further comprising at least one modified contact pad having a reduced surface area, and a different size, a different shape, or both, as compared to the at least one unmodified contact pad, wherein the plurality of contact pads is arranged in two linear arrays extending parallel to one another and defining a gap therebetween and wherein the plurality of electrode traces is arranged in a grid pattern positioned in the gap.

A printed electronic device comprising:

• a plurality of contact pads arranged in a pattern,
• a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, and
• a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers,
• wherein the plurality of contact pads comprises at least one unmodified contact pad having a surface area, shape and size, the plurality of contact pads further comprising at least one modified contact pad having a reduced surface area, and a different size, a different shape, or both, as compared to the at least one unmodified contact pad, wherein the at least one modified contact pad has an edge configured such that a clearance between the edge and a closest neighboring electrode trace is at least 2*√{square root over (2)}*(line registration capability).

A printed electronic device comprising:

• a plurality of contact pads arranged in a pattern,
• a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, and
• a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers,
• wherein the plurality of contact pads comprises at least one unmodified contact pad having a surface area, shape and size, the plurality of contact pads further comprising at least one modified contact pad having a reduced surface area, and a different size, a different shape, or both, as compared to the at least one unmodified contact pad, wherein an end of each electrode trace of the plurality of electrode traces extends linearly to the associated contact pad and wherein the at least one modified contact pad has an edge which is linear and oriented parallel to a closest neighboring electrode trace.