Semiconductor device with barrier layer

A semiconductor device, comprising:

• an interconnect substrate having an interconnect trace disposed on an upper surface thereof;
• a semiconductor chip mounted on the upper surface of the interconnect substrate;
• an adhesive resin layer disposed between the upper surface of the interconnect substrate and a lower surface of the semiconductor chip to bond the interconnect substrate and the semiconductor chip, the adhesive resin layer including an opening at a bottom of which an upper surface of the interconnect trace is situated;
• a barrier layer covering a sidewall of the opening;
• and
• a conductive paste disposed inside the opening,
• wherein an electrode terminal of the semiconductor chip situated at the lower surface thereof is disposed inside the opening, with the conductive paste filling a space between the barrier layer and the electrode terminal, and
• wherein the barrier layer is disposed both on the sidewall of the opening and on a bottom face of the opening, the sidewall being the adhesive resin layer, the bottom face being the interconnect trace.