Methods of fabricating semiconductor devices including differing barrier layer structures

A method of fabricating a semiconductor device, comprising:

• forming a sacrificial gate pattern that crosses an active pattern of a substrate;
• forming a pair of spacers on opposing sides of the sacrificial gate pattern;
• removing the sacrificial gate pattern to form a gate trench defined by the pair of spacers on a first region of the substrate, a second region of the substrate, and on a third region of the substrate;
• sequentially forming a first conductive layer, a first barrier layer, a second barrier layer, a sacrificial layer, a second conductive layer, and a third conductive layer in the gate trench;
• performing a first etching process to remove the third conductive layer from the second region and from the third region, a roughness of a top surface of the sacrificial layer being increased during the first etching process, the third conductive layer remaining on the first region after the first etching process;
• and
• performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer remaining on the first region and on the second region after the second etching process.