Multiple data rate memory

A multiple data rate memory configured to implement first and second memory accesses within a single cycle of an external clock signal, the memory comprising:

• a plurality of memory cell groups, each memory cell group comprising a plurality of memory cells that are each operatively connected to at least one pair of local bit lines;
• the at least one local bit line of each memory cell group being connected to a local-to-global interface circuit;
• wherein the local-to-global interface circuit is configured to control the state of at least one first global bit line in dependence upon the state of the at least one local bit line during the first memory access and to control the state of at least one second global bit line in dependence upon the state of the at least one local bit line during the second memory access;
• wherein the local-to-global interface circuit comprises a first local dynamic read buffer and a second local dynamic read buffer, the first local read buffer being configured to control the state of a first global bit line in dependence upon the state of the first of the pair of local bit lines during the first memory access, and the second local read buffer is configured to control the state of the second global bit line in dependence upon the state of the first of the pair of local bit lines during the second memory access;
• wherein each dynamic read buffer is configured to pulldown on the respective global bit line in dependence upon the state of the respective local bit line when the dynamic buffer is enabled;
• and
• wherein the or each dynamic buffer comprises:
• a local bit line-enabled pull-up transistor;
• a clocked transistor connected between the local bit line-dependent pull-up transistor and a buffer node of the dynamic buffer;
• a precharge pull-down transistor connected between the buffer node and ground;
• and
• a buffer pull-down transistor connected to the respective global bit line, a gate of the buffer pull-down transistor being connected to the buffer node.