Drive circuit, display device, and drive method

A drive circuit comprising:

• an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines, the plurality of gate lines including first to sixth gate lines sequentially disposed in a scanning direction;
• a first transistor in which one of conductive electrodes is electrically connected to the first gate line while another conductive electrode is electrically connected to the third gate line;
• a second transistor in which one of conductive electrodes is electrically connected to the second gate line while another conductive electrode is electrically connected to the fourth gate line;
• a third transistor in which one of conductive electrodes is electrically connected to the third gate line while another conductive electrode is electrically connected to the fifth gate line;
• a fourth transistor in which one of conductive electrodes is electrically connected to the fourth gate line while another conductive electrode is electrically connected to the sixth gate line;
• a first control line electrically connected to a control electrode of the first transistor;
• a second control line electrically connected to a control electrode of the second transistor;
• a third control line electrically connected to a control electrode of the third transistor;
• and
• a fourth control line electrically connected to a control electrode of the fourth transistor,
• wherein the first transistor is put into an on state to electrically connect the first gate line and the third gate line after the output circuit outputs the gate-on voltage to the first gate line,
• the second transistor is put into the on state to electrically connect the second gate line and the fourth gate line after the output circuit outputs the gate-on voltage to the second gate line,
• the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line after the output circuit outputs the gate-on voltage to the third gate line, and
• the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line after the output circuit outputs the gate-on voltage to the fourth gate line.