Semiconductor memory device and method of operating a semiconductor device in a processor mode or a normal mode

A method for a processor-in-memory (PIM) device including a memory cell array and an internal processor, the method including:

• receiving, at the PIM device, a first mode indicator that indicates whether the PIM device should operate in a processor mode or in a normal mode;
• receiving, at the PIM device, processing information for the PIM device;
• storing the processing information in a first memory cell region of the memory cell array;
• receiving, at the PIM device, a read command from a host;
• when the first mode indicator indicates that the PIM device should operate in the processor mode:
• in response to the read command, accessing the stored processing information,
• using the accessed processing information to perform internal processing by the internal processor, and
• storing a result of the internal processing in a second memory cell region of the memory cell array;
• and
• when the first mode indicator indicates that the PIM device should operate in the normal mode:
• in response to the read command, accessing first user data in the second memory cell region of the memory cell array, and outputting the first user data to the host,
• wherein the internal processing is a processing operation on user data stored in the memory cell array prior to the first mode indicator being received, and
• wherein the memory cell array is implemented as a single semiconductor chip.