Cable detection
AssigneeQuanta Computer Inc.
InventorsJen-Hsuen Huang, Fa-Da Lin, Yi-Ping Lin
Life of this patent
Estimating the term…
Abstract
A computing device configured to detect proper cable assembly to improve assembly and problem diagnosis is provided. The computing device includes a motherboard, a function board, and a middle plane connecting the motherboard and function board. The motherboard includes a baseboard management controller (BMC). The BMC is connected to I2C buses. The function board includes integrated circuits. The middle plane includes cable connections interconnecting the I2C buses that are connected to the BMC and the integrated circuits. The integrated circuits have unique system addresses that are identifiable by the BMC.
Claims15
A computing device, comprising:
- at least one motherboard comprising at least one baseboard management controller (BMC) and a plurality of I2C buses connected to the BMC;
- at least one function board comprising a plurality of integrated circuits;
- and
- a middle plane comprising a plurality of cable connections configured to receive a plurality of cables connected to respective I2C buses and plurality of to respective integrated circuits, wherein each integrated circuit of the plurality of integrated circuits comprises a unique address,
- wherein the BMC is configured to:
- store a corresponding address of a first integrated circuit of the plurality of integrated circuits;
- receive a unique address from the first integrated circuit of the plurality of integrated circuits via a first I2C bus upon becoming communicatively coupled to the BMC via the cabling;
- and
- verifying the received unique address of the first integrated circuit in view of the corresponding address of the first integrated circuit stored in the BMC to determine if the first integrated circuit is an intended integrated circuit.
A computing device, comprising:
- a plurality of motherboards, each motherboard comprising at least one baseboard management controller (BMC) and at least one I2C bus connected to the at least one BMC;
- at least one function board comprising a plurality of integrated circuits, wherein each integrated circuit of the plurality of integrated circuits comprises a unique address;
- and
- a middle plane comprising a plurality of cable connections configured to receive a plurality of cables connected to respective I2C buses and to respective integrated circuits,
- wherein each BMC is configured to:
- store a corresponding address of a first integrated circuit of the plurality of integrated circuits;
- receive a unique address from the first integrated circuit of the plurality of integrated circuits via a first I2C bus upon becoming communicatively coupled to the BMC via the cabling;
- and
- verifying the received unique address of the first integrated circuit in view of the corresponding address of the first integrated circuit stored in the BMC to determine if the first integrated circuit is an intended integrated circuit.
A computing device, comprising:
- at least one motherboard comprising at least one baseboard management controller (BMC) and a plurality of I2C buses connected to the BMC;
- a plurality of function boards, wherein each of the plurality of function boards comprises a plurality of integrated circuits;
- and
- a middle plane comprising a plurality of cable connections configured to receive a plurality of cables connected to respective I2C buses and to respective integrated circuits, wherein each integrated circuit of the plurality of integrated circuits comprises a unique address,
- wherein each BMC is configured to:
- store a corresponding address of a first integrated circuit of the plurality of integrated circuits;
- receive a unique address from the first integrated circuit of the plurality of integrated circuits via a first I2C bus upon becoming communicatively coupled to the BMC via the cabling;
- and
- verifying the received unique address of the first integrated circuit in view of the corresponding address of the first integrated circuit stored in the BMC to determine if the first integrated circuit is an intended integrated circuit.
Dependencies are inferred from the claim text.