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US 10,592,419 B2Granted
Memory system
AssigneeSK hynix Inc.
InventorsYong-Woo Lee, Min-Chang Kim, Chang-Hyun Kim, Do-Yun Lee, Jae-Jin Lee, Hun-Sam Jung
Life of this patent
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Abstract
A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
Claims14
A memory system comprising:
- a first memory device including a first memory working as a cache memory for a second memory;
- a second memory device including the second memory storing cached subset of a data storage memory;
- processor caches storing cached subset of the first memory and the second memory;
- and
- a combined memory controller controlling access to the processor caches, the first memory and the second memory,
- wherein one or more static random access memories (SRAMs) as the processor caches, one or more dynamic random access memories (DRAMs) as the first memory, one or more non-volatile memories as the second memory and the combined memory controller are stacked in a memory stack through a through-via, and
- wherein the memory stack forms a single dual inline memory module (DIMM).
4 more elements
A memory system comprising:
- a first memory device including a first memory storing cached subset of a second memory and a first memory controller controlling the first memory to store data;
- and
- a second memory device including the second memory storing cached subset of a data storage memory and a second memory controller controlling the second memory to store data,
- wherein the first memory includes a high-speed memory working as a cache memory for a high-capacity memory and the high-capacity memory working as a cache memory for the second memory,
- wherein one or more high-speed memories and one or more high-capacity memories form a single dual inline memory module (DIMM),
- wherein the high-capacity memories have a stack structure, in which volatile memory stacks are mounted on a buffer, and
- wherein the first memory controller transfers a signal between a processor and the second memory device based on at least one of values of a memory selection field and a handshaking information field included in the signal.
4 more elements
Dependencies are inferred from the claim text.