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US 10,592,356 B2Granted
Microcontroller and electronic control unit
AssigneeDenso Corporation
InventorsYusuke Kamegai, Nobuhiko Makino
Life of this patent
Estimating the term…
Abstract
A microcontroller includes two processing blocks that respectively have a Central Processing Unit (CPU) and a peripheral circuit, where an access to the peripheral circuit in each of the processing blocks, that is, to a Read-Only Memory (ROM) or a Pulse Width Modulator (PWM) signal generator, is limited only from the CPU disposed in the same processing block. Thereby a fail-safe functionality of the microcontroller is improved.
Claims15
A microcontroller comprising:
- at least two processing blocks provided on one semiconductor chip, each of the processing blocks including a Central Processing Unit (CPU) and a peripheral circuit, wherein the peripheral circuit included in one processing block is not accessible by the CPU included in another processing block;
- a shared memory that is accessible from the CPU in each of the at least two processing blocks, wherein the shared memory is part of a random access memory that is directly read accessible and directly write accessible, as memory, by all of the CPUs in the microcontroller;
- a plurality of clock feeders each producing a respective clock signal;
- and
- a plurality of switching circuits configured to alternate between feeding the at least two processing blocks one of the respective clock signals and another one of the respective clock signals.
2 more elements
A microcontroller comprising:
- at least two processing blocks provided on one semiconductor chip, each of the processing blocks including a Central Processing Unit (CPU) and a peripheral circuit, wherein the peripheral circuit included in one processing block is not accessible by the CPU included in another processing block;
- and
- a plurality of clock feeders each producing a respective clock signal;
- and
- at least two switching circuits configured to alternate between feeding the at least two processing blocks one of the respective clock signals and another one of the respective clock signals.
2 more elements
Dependencies are inferred from the claim text.