Dual-mode error-correction code/write-once memory codec
AssigneeTexas Instruments Incorporated
InventorsSai Zhang, Yuming Zhu, Clive Bittlestone, Srinath Ramaswamy
Life of this patent
Estimating the term…
Loading patent…
AssigneeTexas Instruments Incorporated
InventorsSai Zhang, Yuming Zhu, Clive Bittlestone, Srinath Ramaswamy
Estimating the term…
A system for error correction code (ECC) management of write-once memory (WOM) codes includes, for example, a controller for selecting between one of a WOM (Write-Once Memory) mode and an ECC (error correction code) mode. A codec is arranged to operate in the selected mode. The codec while operating in the ECC mode is arranged to identify a bit position of at least one bit error in response to ECC parity bits of a first received data word. The codec while operating in the WOM mode is arranged to receive a WOM-encoded word from an addressed location in a WOM device, to receive a second received data word to be encoded and written to the addressed location, and to generate WOM-encoded word for writing to the addressed location in the WOM device. The WOM-encoded word for writing to the addressed location is optionally ECC encoded.
A circuit, comprising:
Dependencies are inferred from the claim text.