Computation node device, parallel computer system, and control method for computation node device
AssigneeFujitsu Limited
InventorsYuji Kondo, Shinya Hiramoto, Yuichiro Ajima
Life of this patent
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Abstract
A computation node device includes a buffer configured to store first data, a receiver configured to receive a packet including second data, an error check circuit configured to perform an error check of the packet and output a check result, and an operation device configured to perform, before receiving the check result output from the error check circuit, a reduction operation by using the first data stored in the buffer and the second data included in the packet and output an operation result of the reduction operation when the check result output from the error check circuit indicates non-existence of an error in the packet.
Claims9
A computation node device comprising:
- a buffer configured to store first data;
- a receiver configured to receive a packet including second data;
- an error check circuit configured to perform an error check of the packet and output a check result;
- and
- an operation device configured to perform, before receiving the check result output from the error check circuit, a reduction operation by using the first data stored in the buffer and the second data included in the packet and output an operation result of the reduction operation when the check result output from the error check circuit indicates non-existence of an error in the packet.
A parallel computer system including a plurality of computation node devices, wherein
- each of the plurality of computation node devices includes:
- a buffer configured to store first data;
- a receiver configured to receive a packet that includes second data from a different computation node device;
- an error check circuit configured to perform an error check of the packet and output a check result;
- and
- an operation device configured to perform, before receiving the check result output from the error check circuit, an operation by using first data stored in the buffer and second data included in the packet and output an operation result of the performed operation when the check result indicates non-existence of an error in the received packet.
A control method for a computation node device that includes a buffer configured to store first data, a receiver, an error check circuit, and an operation device, the control method comprising:
- receiving, by the receiver, a packet including second data;
- performing, by the error check circuit, an error check of the packet to output a check result;
- performing, by the operation device and before receiving the check result output from the error check circuit, an operation by using first data stored in the buffer and second data included in the packet;
- and
- outputting, by the operation device, an operation result of the performed operation when the check result indicates non-existence of an error in the received packet.
Dependencies are inferred from the claim text.