Safety hypervisor function
AssigneeInfineon Technologies AG
InventorsSimon Brewerton, Glenn Farrall, Neil Hastie, Frank Hellwig, Richard Knight, Antonio Vilela
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AssigneeInfineon Technologies AG
InventorsSimon Brewerton, Glenn Farrall, Neil Hastie, Frank Hellwig, Richard Knight, Antonio Vilela
Estimating the term…
The disclosure relates to systems and methods for defining a processor safety privilege level for controlling a distributed memory access protection system. More specifically, a safety hypervisor function for accessing a bus in a computer processing system includes a module, such as a Computer Processing Unit (CPU) or a Direct Memory Access (DMA) for accessing a system memory and a memory unit for storing a safety code, such as a Processor Status Word (PSW) or a configuration register (DMA (REG)). The module allocates the safety code to a processing transaction and the safety code is visible upon access of the bus by the module.
A system that provides access protection, the system comprising:
A system that provides access protection, the system comprising:
Dependencies are inferred from the claim text.