Data merge method which reads first physical unit twice for respectively performing first stage programming operation and second stage programming operation on second physical unit, memory storage device and memory control circuit unit

A memory storage device, comprising:

• a connection interface unit, configured to couple to a host system;
• a rewritable non-volatile memory module which comprises a plurality of physical units;
• and
• a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to perform a data merge operation to store valid data collected from a source node to a recycling node,
• wherein the source node comprises at least one first physical unit among the physical units, the recycling node comprises a second physical unit among the physical units, and
• the data merge operation comprises:
• sending a first read command sequence which instructs a reading of a first data from the at least one first physical unit by a first reading operation;
• sending a first write command sequence which instructs a first stage programming operation on the second physical unit according to the first data;
• sending a second read command sequence which instructs a reading of the first data from the at least one first physical unit again by a second reading operation after the first stage programming operation is performed;
• and
• sending a second write command sequence which instructs a second stage programming operation on the second physical unit according to the first data read by the second reading operation.

A memory control circuit unit for controlling a rewritable non-volatile memory module which comprises a plurality of physical units, wherein the memory control circuit unit comprises:

• a host interface configured to couple to a host system;
• a memory interface, configured to couple to the rewritable non-volatile memory module;
• and
• a memory management circuit, coupled to the host interface and the memory interface,
• wherein the memory management circuit is configured to perform a data merge operation to store valid data collected from a source node to a recycling node,
• wherein the source node comprises at least one first physical unit among the physical units, the recycling node comprises a second physical unit among the physical units, and
• the data merge operation comprises:
• sending a first read command sequence which instructs a reading of a first data from the at least one first physical unit by a first reading operation;
• sending a first write command sequence which instructs a first stage programming operation on the second physical unit according to the first data;
• sending a second read command sequence which instructs a reading of the first data from the at least one first physical unit again by a second reading operation after the first stage programming operation is performed;
• and
• sending a second write command sequence which instructs a second stage programming operation on the second physical unit according to the first data read by the second reading operation.