Fast input/output in a content-addressable storage architecture with paged metadata
AssigneeEMC IP Holding Company LLC
InventorsZvi Schneider, Amitai Alkalay, Assaf Natanzon
Life of this patent
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AssigneeEMC IP Holding Company LLC
InventorsZvi Schneider, Amitai Alkalay, Assaf Natanzon
Estimating the term…
An aspect of minimizing read amplification IO where metadata is not in RAM includes reading a l_md_page and corresponding lp_md_page from a storage device in a dual distributed layered architecture. The l_md_page specifies a metadata page that persists in a SSD and having logical addresses of metadata, and the lp_md_page associates logical block addresses with corresponding physical locations for the metadata. An aspect further includes reading data for a redundant array of independent disks (RAID) stripe according to an associated physical offset in the lp_md_page, accessing a stripe counter from the lp_md_page, and comparing the stripe counter from the lp_md_page to a stripe counter held in memory. Upon determining the stripe counter from the lp_md_page is the same, an aspect further includes determining the data is valid and reading the data according to associated physical offset in the lp_md_page and while bypassing a data module for the data.
A method for minimizing read amplification for input/output (IO) where metadata is not in random access memory (RAM), comprising:
A system for minimizing read amplification for input/output (IO) where metadata is not in random access memory (RAM), comprising:
A computer program product embodied on a non-transitory computer readable medium, the computer program product including instructions that, when executed by a computer causes the computer to perform operations comprising:
Dependencies are inferred from the claim text.