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US 10,592,163 B2Granted
Controlling write pulse width to non-volatile memory based on free space of a storage
AssigneeToshiba Memory Corporation
InventorsHiroki Noguchi, Shinobu Fujita
Life of this patent
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Abstract
A memory system has a non-volatile memory, a storage accessible at higher speed than the non-volatile memory, to store access information to the non-volatile memory before accessing the non-volatile memory, and a memory controller to control a write pulse width to the non-volatile memory based on a free space of the storage or based on the access information stored in the storage.
Claims18
A memory system comprising:
- a non-volatile memory;
- a storage accessible at higher speed than the non-volatile memory, to store access information that includes information of whether or not to perform writing or reading to the non-volatile memory, the information including at least one of a write command and a read command;
- and
- a memory controller to select either one of a first mode and a second mode based on a free space of the storage or based on the write and read commands stored in the storage, the first mode being a mode to write data in the non-volatile memory with a first write pulse width, and then perform a verification process to read and inspect the written data, and the second mode being a mode to write data, without the verification process, with a second write pulse width longer than the first write pulse width in the first mode.
1 more element
A processor system comprising:
- a processor;
- a non-volatile memory accessed by the processor;
- a storage accessible at higher speed than the non-volatile memory, to store access information that includes information of whether or not to perform writing or reading to the non-volatile memory, the information including at least one of a write command and a read command;
- and
- a memory controller to select either one of a first mode and a second mode based on a free space of the storage or based on the write and read commands stored in the storage, the first mode being a mode to write data in the non-volatile memory with a first write pulse width, and then perform a verification process to read and inspect the written data, and the second mode being a mode to write data, without the verification process, with a second write pulse width longer than the first write pulse width in the first mode.
2 more elements
Dependencies are inferred from the claim text.