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US 10,592,115 B1Granted
Cache management system and method
AssigneeEMC IP Holding Company LLC
InventorsAmnon Izhar, Patrick J. Weiler
Life of this patent
Estimating the term…
Abstract
A method, computer program product, and computing system for receiving a plurality of data streams on an SSD cache memory system associated with a backend storage system and writing a first of the plurality of data streams to a first portion of the SSD cache memory system.
Claims21
A computer-implemented method, executed on a computing device, comprising:
- receiving a plurality of data streams associated with a plurality of users on an SSD cache memory system associated with a backend storage system;
- writing a first of the plurality of data streams associated with a first user to a first portion of the SSD cache memory system, wherein the first portion of the SSD cache memory system includes a first erase block within the SSD cache memory system, wherein writing the first of the plurality of data streams includes padding the writing of the first of the plurality of data streams to fill at least one cache page of a first group of cache pages relative to the first erase block, wherein the first of the plurality of data streams associated with the first user to the first portion of the SSD cache memory system is collectively destaged into the backend storage system;
- and
- writing a second of the plurality of data streams associated with a second user to a second portion of the SSD cache memory system, wherein the second portion of the SSD cache memory system includes a second erase block within the SSD cache memory system, wherein writing the second of the plurality of data streams includes padding the writing of the second of the plurality of data streams to fill at least one cache page of a second group of cache pages relative to the second erase block, wherein the second of the plurality of data streams associated with the second user to the second portion of the SSD cache memory system is collectively destaged into the backend storage system, and wherein no portion of the data comprising the second portion of the SSD cache memory system is a part of the first portion of the SSD cache memory system.
1 more element
A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:
- receiving a plurality of data streams associated with a plurality of users on an SSD cache memory system associated with a backend storage system;
- and
- writing a first of the plurality of data streams associated with a first user to a first portion of the SSD cache memory system, wherein the first portion of the SSD cache memory system includes a first erase block within the SSD cache memory system, wherein writing the first of the plurality of data streams includes padding the writing of the first of the plurality of data streams to fill at least one cache page of a first group of cache pages relative to the first erase block, wherein the first of the plurality of data streams associated with the first user to the first portion of the SSD cache memory system is collectively destaged into the backend storage system;
- and
- writing a second of the plurality of data streams associated with a second user to a second portion of the SSD cache memory system, wherein the second portion of the SSD cache memory system includes a second erase block within the SSD cache memory system, wherein writing the second of the plurality of data streams includes padding the writing of the second of the plurality of data streams to fill at least one cache page of a second group of cache pages relative to the second erase block, wherein the second of the plurality of data streams associated with the second user to the second portion of the SSD cache memory system is collectively destaged into the backend storage system, and wherein no portion of the data comprising the second portion of the SSD cache memory system is a part of the first portion of the SSD cache memory system.
2 more elements
A computing system including a processor and memory configured to perform operations comprising:
- receiving a plurality of data streams associated with a plurality of users on an SSD cache memory system associated with a backend storage system;
- and
- writing a first of the plurality of data streams associated with a first user to a first portion of the SSD cache memory system, wherein the first portion of the SSD cache memory system includes a first erase block within the SSD cache memory system, wherein writing the first of the plurality of data streams includes padding the writing of the first of the plurality of data streams to fill at least one cache page of a first group of cache pages relative to the first erase block, wherein the first of the plurality of data streams associated with the first user to the first portion of the SSD cache memory system is collectively destaged into the backend storage system;
- and
- writing a second of the plurality of data streams associated with a second user to a second portion of the SSD cache memory system, wherein the second portion of the SSD cache memory system includes a second erase block within the SSD cache memory system, wherein writing the second of the plurality of data streams includes padding the writing of the second of the plurality of data streams to fill at least one cache page of a second group of cache pages relative to the second erase block, wherein the second of the plurality of data streams associated with the second user to the second portion of the SSD cache memory system is collectively destaged into the backend storage system, and wherein no portion of the data comprising the second portion of the SSD cache memory system is a part of the first portion of the SSD cache memory system.
2 more elements
Dependencies are inferred from the claim text.