Power management with hardware virtualization

A system comprising:

• a memory system configured to store computer-executable instructions;
• and
• a computing system, in response to execution of the computer-executable instructions by a processing device, is configured to:
• enter a low power mode by utilizing a configurable memory mapping to store, with the processing device in a user mode or an operating system mode, information corresponding to running programs to the memory system, storing, with the processing device in a hypervisor mode, processor state information to a reserved portion of the memory system, protecting, with the processing device in the hypervisor mode, the memory system from memory access prior to disabling hardware components of the system, and disabling the hardware components of the system, wherein the processor state information identifies a configuration of the configurable memory mapping that associates physical memory addresses in the main memory and virtual memory addresses utilized by the processing device in the user mode or the operating system mode, and wherein the reserved portion of the main memory corresponds to a predefined memory mapping between the processing device in the hypervisor mode and the main memory;
• and
• exit the low power mode by enabling hardware components of the computing system, retrieving, with the processing device in the hypervisor mode, the processor state information from the reserved portion of the memory system, and loading, with the processing device in the user mode or the operating system mode, the stored information corresponding to running programs from the memory system based, at least in part, on the configuration of the configurable memory mapping in the retrieved processor state information.

An apparatus comprising at least one non-transitory computer-readable memory device storing instructions configured to cause one or more processing devices to perform operations comprising:

• entering a low power mode by utilizing a configurable memory mapping to store information corresponding to running programs to a main memory while in a user mode or an operating system mode, storing processor state information to a reserved portion of the main memory while in a hypervisor mode, protecting, while in the hypervisor mode, the main memory from memory access with the processing devices prior to disabling hardware components of a computing system, and disabling the hardware components of the computing system, wherein the processor state information identifies a configuration of the configurable memory mapping that associates physical memory addresses in the main memory and virtual memory addresses utilized by the processing device in the user mode or the operating system mode, and wherein the reserved portion of the main memory corresponds to a predefined memory mapping between the processing device in the hypervisor mode and the main memory;
• and
• exiting the low power mode by enabling hardware components of the computing system, retrieving the processor state information from the reserved portion of the main memory while in the hypervisor mode, and loading the stored information corresponding to running programs from the main memory while in the user mode or the operating system mode based, at least in part, on the configuration of the configurable memory mapping in the retrieved processor state information.