Array substrate and display device

An array substrate comprising:

• a plurality of pixel units, each pixel unit comprising a drain pad, a pixel electrode and an insulating layer above the drain pad,
• wherein the drain pad has a first via hole, and the insulating layer has a second via hole, wherein the second via hole exposes at least a portion of the first via hole and a portion of the drain pad around the first via hole, and wherein the pixel electrode extends along an inner wall of the second via hole and contacts an exposed portion of the drain pad,
• wherein the array substrate comprises a plurality of gate lines and a plurality of data lines, the gate lines and data lines are interlaced with each other, so as to divide the array substrate into the plurality of pixel units, the gate lines and data lines are separated by a gate insulating layer,
• wherein the array substrate further comprises an active layer retaining pattern between the drain pad and the gate insulating layer, an orthographic projection of the active layer retaining pattern at least partially overlapping an orthographic projection of the second via hole on the gate insulating layer, and
• wherein the active layer retaining pattern has an opening for exposing the gate insulating layer, an orthographic projection of the opening at least partially overlapping an orthographic projection of the first via hole on the gate insulating layer.