Semiconductor integrated circuit

A semiconductor integrated circuit, comprising:

• a first power supply line and a second power supply line that are coupled to a protected circuit;
• a third power supply line that is supplied with a voltage different from respective voltages supplied to the first power supply line and second power supply line;
• a detection circuit that is coupled between the first power supply line and the second power supply line and detects a surge occurring in the first power supply line;
• an inverter circuit that includes one or more inverters coupled in series, and is coupled between the first power supply line and the second power supply line;
• a protection transistor that is coupled between the first power supply line and the second power supply line, and is controlled by an output of the detection circuit to cause the surge to flow through the second power supply line;
• and
• a time constant circuit that is coupled to at least the third power supply line and the protection transistor, wherein
• the protection transistor is an n-channel metal-oxide semiconductor transistor,
• the first power supply line is supplied with a positive voltage,
• the second power supply line is supplied with a ground voltage, and
• the third power supply line is supplied with a negative voltage.

A semiconductor integrated circuit, comprising:

• a first power supply line and a second power supply line that are coupled to a protected circuit;
• a third power supply line that is supplied with a voltage different from respective voltages supplied to the first power supply line and second power supply line;
• a detection circuit that is coupled between the first power supply line and the second power supply line and detects a surge occurring in the first power supply line;
• an inverter circuit that includes one or more inverters coupled in series, and is coupled between the first power supply line and the second power supply line;
• a protection transistor that is coupled between the first power supply line and the second power supply line, and is controlled by an output of the detection circuit to cause the surge to flow through the second power supply line;
• and
• a time constant circuit that is coupled to at least the third power supply line and the protection transistor, wherein
• the protection transistor is a p-channel metal-oxide semiconductor transistor,
• the first power supply line is supplied with a first positive voltage,
• the second power supply line is supplied with a ground voltage, and
• the third power supply line is supplied with a second positive voltage that is higher than the first positive voltage.