Method of synchronizing host and coprocessor operations via FIFO communication

A method of synchronizing program executions of a host processor and of a coprocessor, the method comprising:

• A) dividing an application into a host portion and a helper portion;
• B) implementing of the host portion on the host processor and implementing the helper portion on the coprocessor;
• C) writing to a FIFO(first in first out memory) by the host processor of FIFO entries that include an event command followed by at least one coprocessor instruction, whereby the event command occupies a head of the FIFO;
• D) comparing the event command in the FIFO head with a registry entry in a current event register of the coprocessor;
• E) repeating step D) until the registry entry in the current event register agrees with the event command in the FIFO head;
• F) popping the event command and the at least one coprocessor instruction from the FIFO and forwarding the popped at least one coprocessor instruction to the coprocessor, said popping being continued until all of the FIFO entries have been popped, or until a FIFO entry is encountered that is a subsequent event command;
• G) writing by the coprocessor to the current event register of an entry that does not agree with any remaining FIFO entry event commands;
• H) executing by the coprocessor of the helper portion of the application;
• I) transmitting by the coprocessor to the host processor of a message indicating that execution of the helper portion has been completed;
• and J) writing by the coprocessor to the current event register of an event command registry entry.