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US 10,559,650 B2Granted
Trench capacitor with warpage reduction
AssigneeTexas Instruments Incorporated
InventorsJiao Jia, Zhipeng Feng, He Lin, Yunlong Liu, Manoj Jain
Life of this patent
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Abstract
A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.
Claims20
A method for forming a trench capacitor, comprising:
- forming a plurality of trenches in a doped semiconductor surface layer of a substrate;
- forming a dielectric layer that lines a surface of the plurality of trenches;
- depositing a first polysilicon layer that is undoped on the dielectric layer;
- depositing a second polysilicon layer on the first undoped polysilicon layer to fill the plurality of deep trenches;
- doping the second polysilicon layer;
- top side polysilicon etching using a masking layer pattern to etch back the first polysilicon layer in regions lateral to the plurality of trenches;
- and
- further comprising after the depositing the second polysilicon layer removing the first polysilicon layer and the second polysilicon layer from a back side of the substrate.
5 more elements
A method for forming a trench capacitor, comprising:
- forming a plurality of trenches in a doped semiconductor surface layer of a substrate;
- forming a dielectric layer that lines a surface of the plurality of trenches;
- depositing a first polysilicon layer that is undoped on the dielectric layer;
- depositing a second polysilicon layer over the first undoped polysilicon layer to fill the plurality of deep trenches;
- doping the second polysilicon layer;
- and
- top side polysilicon etching using a masking layer pattern to etch back the first polysilicon layer in regions lateral to the plurality of trenches.
4 more elements
A method for forming a trench capacitor, comprising:
- forming a plurality of trenches in a doped semiconductor surface layer of a substrate;
- forming a dielectric layer that lines a surface of the plurality of trenches;
- forming an undoped first polysilicon layer over the dielectric layer and over a back side of the substrate;
- forming a doped second polysilicon layer over the undoped first polysilicon layer within the trenches and over the back side of the substrate;
- removing the first and second polysilicon layers from over the surface layer, leaving a remaining portion of the second polysilicon layer within each trench and a remaining portion of the first polysilicon layer that electrically connects the remaining portions of the second polysilicon layer within the trenches;
- and
- removing the first and second polysilicon layers from over the substrate back side.
4 more elements
Dependencies are inferred from the claim text.