Timing loop for adjacent track interference cancellation
AssigneeSeagate Technology LLC
InventorsZheng Wu, Jason Bellorado, Marcus Marrow, Vincent B Ashe
Life of this patent
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Abstract
In one implementation, the disclosure provides a system including a first circuit to compute a timing error based on a received error signal and an estimated interference signal and a timing loop filter to output a frequency offset and a phase shift based on the timing error received as input. The system also includes a phase accumulator to accumulate at least a phase shift to generate a sample index and phase and an interpolation filter to generate samples of a side track signal using the sample index and phase.
Claims20
A system comprising:
- a first circuit configured to compute a timing error based on a received error signal and an estimated interference signal;
- a timing loop filter configured to output a frequency offset and a phase shift based on the timing error received as input;
- a phase accumulator configured to accumulate at least the phase shift to generate a sample index and a phase;
- and
- an interpolation filter configured to generate samples of a side track signal using the sample index and the phase.
A method comprising:
- computing a timing error based on a received error signal and an estimated interference signal;
- outputting a phase shift based on the timing error;
- accumulating at least the phase shift to generate a sample index and a phase;
- generating samples of a side track signal using the sample index and the phase;
- and
- generating a clean center track signal using a read back signal and the estimated side track signal.
A method comprising:
- computing a timing error based on a received error signal and an estimated interference signal;
- outputting a phase shift based on the timing error;
- accumulating at least the phase shift to generate a sample index and a phase;
- generating parallel streams of samples of a side track signal using the sample index and the phase;
- and
- generating a clean center track signal using a read back signal and the estimated side track signal.
Dependencies are inferred from the claim text.